The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Class A amplifying devices operate over an entire cycle of an input signal. An output signal of these devices is a scaled-up replica of the input signal. These devices are not very efficient since they have a maximum efficiency of 50% with inductive output coupling and 25% with capacitive output coupling.
In Class A amplifying devices, an amplifying element such as a transistor is biased such that the device is always conducting. The amplifying element is operated over a linear portion of the transfer characteristic of the transistor. Because the amplifying element is always conducting, power is drawn from the power supply even when there is no input. If high output power is needed, power consumption (and the accompanying heat) may become significant.
Class B amplifying devices amplify during half of an input cycle. As a result, Class B amplifying devices tend to increase distortion but have higher efficiency than Class A amplifying devices. Class B amplifying devices have a maximum efficiency over 75%. This is because the amplifying element is switched off half of the time and does not dissipate power at this time.
Class B amplifying devices may use complementary transistor pairs (a “push-pull” transistor arrangement). Complementary devices amplify opposite halves of the input signal. Mismatch or crossover distortion may occur when re-joining the halves of the signal. One solution to the mismatch problem involves biasing the transistors to be just on, rather than completely off when not in use. This biasing approach is called Class AB operation. In other words, Class AB amplifying devices may include a class B output stage that is biased so that both transistors are conducting around the crossover point.